ADDER X-SC Manual de usuario descargar pdf (Pagina 66)

66 CHAPTER 2. COMBINATIONAL DESIGN EXAMPLES

This completes the synthesis pro ce ss for the adder tree. In the following section we design the last block

required by the multiplier.

2.1.4 Output Adder

The design of the output adder is very simple. Since it it not a leaf des ign we just need to provide just it

structural description.

entity add5 is

port(a3,a4,a5,a6 : in bit;

b3,b4,b5,b6,b7 : in bit;

vdd,vss : in bit;

s3,s4,s5,s6,s7,c7 : out bit);

end add5;

architecture structural of add5 is

Component ha

port(a,b : in bit;

vdd,vss : in bit;

sum,carry : out bit);

end component;

component fa

port(a,b,cin : in bit;

vdd,vss : in bit;

sum,cout : out bit);

end component;

signal c3,c4,c5,c6 : bit;

begin

-- carry ripple adder for the 4-bit multiplier

ha1 : ha

port map(a => a3, b => b 3,

vdd => vdd, vss => vss,

sum => s3, carry => c3);

fa1 : fa

port map(a => a4, b => b4, cin => c3,

vdd => vdd, vss => vss,

sum => s4, cout => c4);

fa2 : fa

port map(a => a5, b => b5, cin => c4,

vdd => vdd, vss => vss,

sum => s5, cout => c5);

fa3 : fa

port map(a => a6, b => b6, cin => c5,

vdd => vdd, vss => vss,

sum => s6, cout => c6);

ha2 : ha

port map(a => c6, b => b 7,

vdd => vdd, vss => vss,

sum => s7, carry => c7);

end structural;

Here we also use FlatBeh, BOOM, BOOG and LOON to synthesize the design.

% flatbeh myadd5 myadd5

% boom -l 3 -d 0 myadd5 add5

% boog add5 sadd5 -x 0 -m 4

% loon -x 0 -m 4 sadd5 add5

We are now ready to proceed with the design of the multiplier. This is described in the following section.

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ADDER X-SC Manual de usuario Pagina 66

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